The First phase of the project is to support the SBC on-board hardware. Lets break that down and see what might need to be done...

The baseline EPROM would be useful for new builders trying to validate the primary functions of the SBC. It would be interesting the checksum the EPROM and assure the EPROM interfaces are functioning properly. It is possible for the first section of the EPROM to appear to be working but at progressively higher addresses, there is the possibility of mirrored disfunction. A memory test would be a good idea to assure the RAM address and data lines are working well. 

The Board with a CPU and EPROM can begin diagnostics. Outputting the results will require either the UART or the Parallel Port. Since use of the UART requires a correct cable and settings, use of the parallel port to output low level diagnostics could be easier. There is already a device made to interface with the parallel port and that is the DSKY, but it takes DSKY support selected into the EPROM to support this.

It is possible to output post codes indicating the progress through a set of diagnostic tests. A simple POST card could be made with very little hardware.

Questions to be answered about the environment would include determining the hardware configuration, specifically whether all the supportable hardware is installed. If the program is running, there must be a CPU and an EPROM.

How large is the EPROM?

Is RAM installed? If so, how much? Is it battery-backed?

Is a UART installed?

Is the Parallel port installed?

Is the Dallas RTC chip installed? Has it been kept up with a battery?

If the Dallas chip is installed, the detected configuration could be recorded for subsequent use.